1. Field of the Invention
The present invention relates to a semiconductor having a resistance variable memory cell, more specifically, to a technique that guarantees sure write operation of data at high speed.
2. Description of the Related Arts
While the miniaturization of high-integration dynamic random access memory (DRAM) cells is a dominant trend in design rule, it has not been easy to fabricate a capacitor that can guarantee a sufficient amount of signal. There has been an attempt to fabricate a resistance variable memory by configuring a memory cell with resistance variable elements, not capacitors, and correspondingly assigning a resistance value to logic information 0 or 1. Examples of the resistance variable memory include magnetic RAM (MRAM), phase change memory (PCM), resistive RAM (ReRAM), and solid electrolyte memory (which is proposed by Michael N. Kozicki, et al., in “Non-Volatile Memory Based on Solid Electrolytes”, Non-volatile Memory Technology Symposium 2004, 15-17 Nov. 2004, p. 10-17, and T. Sakamoto et al., in “A Nonvolatile Programming Solid Electrolyte Nanometer Switch”, Solid-State Circuits Conference 2004, Digest of Technical Papers. ISSCC 2004 IEEE International, 15-19 Feb. 2004, Vol. 1). MRAM uses the magnitude or value of tunnel current for writing data in it by using a magnetic material. PCM uses variation of resistance value occurring between a memory layer in amorphous state and a memory layer in crystal state for writing data in it. ReRAM uses a large variation of resistance value correspondingly to the direction of an applied voltage for writing data in it. Solid electrolyte memory has a structure where a solid electrolyte membrane made out of a compound of O, S, Se, and Te is inserted between upper and lower electrodes, and for writing data it uses a low-resistance state realized by forming a metallic conductive path in the solid electrolyte and a high-resistance state realized by losing the conductive path.
In a semiconductor memory device incorporating the resistance variable memory described above, a write operation in the low-resistance state and a write operation in the high-resistance state are carried out separately in different circuits. Moreover, a reference circuit used for deciding a potential during a write operation is connected in parallel to a bit line driver and a memory cell (refer to Japanese Patent Application Publication No. 2004-234707), for example.